 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| may 2012 ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology fan302ul pwm controller for low standby power battery- charger applications ? mwsaver? technology features ? mwsaver? technology provides best-in-class standby power ? achieves <10mw, far below energy star?s 5-star level (<30mw). ? proprietary 500v high-voltage jfet startup reduces startup resistor loss ? low operation current in burst mode: 350a maximum ? constant-current (cc) control without secondary- side feedback circuitry ? fixed pwm frequency at 140khz with frequency hopping to reduce emi ? high-voltage startup ? low operating current: 3.5ma ? peak-current-mode control with slope compensation ? cycle-by-cycle current limiting ? v dd over-voltage protection (auto-restart) ? v s over-voltage protection (latch mode) ? v dd under-voltage lockout (uvlo) ? gate output maximum voltage clamped at 15v ? fixed over-temperature protection (latch mode) ? available in an 8-lead soic package applications battery chargers for cellular phones, cordless phones, pda, digital cameras, and power tools. replaces linear transformers and rcc smps. description advanced pwm controller fan302ul significantly simplifies isolated power supply designs that require constant current (cc) regulation of the output. the output current is precisely es timated with information in the primary side of the transformer and controlled with an internal compensation circuit, not only removing the output current sensing loss, but also eliminating external cc control circuitry. a green-mode function with an extremely low operating current (200a) in burst mode maximizes light-load efficiency, enabling conformance to worldwide standby mode efficiency guidelines. integrated protections include two-level pulse-by-pulse current limit, over-voltage protection (ovp), brownout protection, and over-temper ature protection (otp). compared with a conventional approach using external control circuit in the secondary side for cc regulation; the fan302ul reduces total cost, component count, size, and weight, while simultaneously increasing efficiency, productivity, and system reliability. figure 1. typical output v-i characteristic ordering information part number operating temperature range package packing method FAN302ULMY -40 c to +105 c 8-lead, small-outline integrated circuit (soic), jedec ms-012, .150-inch narrow body tape & reel i o v o maximum typical minimum
? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 2 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology application diagram figure 2. typical application internal block diagram figure 3. functional block diagram ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 3 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology marking information figure 4.top mark pin configuration figure 5. pin assignments pin definitions pin # name description 1 cs current sense . this pin connects a current-sense resist or to detect the mosfet current for peak-current-mode control for output regulation. the current-sense information is also used to estimate the output current for cc regulation. 2 gate pwm signal output . this pin has an internal totem-pole output driver to drive the power mosfet. it is internally clamped at 15v. 3 vdd power supply . ic operating current and mosfet driving current are supplied through this pin. this pin is typically connected to an external v dd capacitor. 4 vs voltage sense . this pin detects the output voltage in formation and diode current discharge time based on voltage of the auxiliary winding. 5 gnd ground 6 fb feedback . typically, an opto-coupler is connected to this pin to provide feedback information to the internal pwm comparator. this feedba ck is used to control the duty cycle in cv regulation. 7 nc no connect 8 hv high voltage . this pin connects to the dc bus for high-voltage startup. f - fairchild logo z: assembly plant code x: year code y: week code tt: die run code t: m=sop p: y= green package m: manufacture flow code ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 4 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and stressi ng the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v hv hv pin input voltage 500 v v vdd dc supply voltage (1,2) 30 v v vs vs pin input voltage -0.3 7.0 v v cs cs pin input voltage -0.3 7.0 v v fb fb pin input voltage -0.3 7.0 v p d power dissipation (t a =25 c) 660 mw ja thermal resistance (junction-to-air) 150 c/w jc thermal resistance (junction-to-case) 39 c/w t j operating junction temperature -40 +150 c t stg storage temperature range -55 +150 c t l lead temperature (wave soldering or ir, 10 seconds) +260 c esd electrostatic discharge capability human body model, jedec:jesd22_a114 (except hv pin) (3) 5.0 kv charged device model, jedec:jesd22_c101 (except hv pin) (3) 1.5 notes: 1. all voltage values, except differential volt ages, are given with respect to the gnd pin. 2. stresses beyond those listed under absolute maximu m ratings may cause permanent damage to the device. 3. esd ratings including the hv pin: hbm=500v, cdm=750v. ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 5 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology electrical characteristics v dd =15v and t a =25 c unless noted. symbol parameter condition min. typ. max. unit hv section v hv-min minimum startup voltage on hv pin 50 v i hv supply current drawn from hv pin v hv =100v, v dd =0v, controller off 0.8 1.5 5.0 ma i hv-lc leakage current drawn from hv pin v hv =500v, v dd =15v (controller on with auxiliary supply) 0.8 3.0 a v dd section v dd-on turn-on threshold voltage v dd rising 15 16 17 v v dd-off turn-off threshold voltage v dd falling 4.7 5.0 5.3 v v dd-lh threshold voltage for latch-off release v dd falling 2.50 v i dd-st startup current v dd =v dd-on ? 0.16v 400 450 a i dd-op operating supply current v dd =18v, f=f osc , c l =1nf 3.5 4.0 ma i dd-burst burst-mode operating supply current v dd =8v, c l =1nf 200 350 a v dd-ovp v dd over-voltage protection level 25.0 26.5 28.0 v t d-vddovp v dd over-voltage protection debounce time f=140khz 100 180 s oscillator section f osc frequency center frequency v cs =5v, v s =2.5, v fb =5v 135 140 145 khz hopping range 5 f osc-cm-min minimum frequency by continuous conduction mode (ccm) prevention circuit (4) 17 22 27 khz f osc-ccm minimum frequency in (cc) regulation v cs =5v, v s =0v 40 45 50 khz feedback input section a v internal voltage scale-down ratio of fb pin (5) 1/3.5 1/3.0 1/2.5 v/v z fb fb pin input impedance 38 42 44 k ? v fb-open fb pin pull-up voltage fb pin open 5.3 v v fb - l fb threshold to disable gate drive in burst mode v fb falling,v cs =5v, v s =0v 1.0 1.1 1.2 v v fb - h fb threshold to enable gate drive in burst mode v fb rising,v cs =5v, v s =0v 1.05 1.15 1.25 v over-temperature protection section t otp threshold temperature for over-temperature protection (6) +130 +140 +150 c continued on the following page? ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 6 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology electrical characteristics (continued) v dd =15v and t a =25 c unless noted. symbol parameter condition min. typ. max. unit voltage-sense section i tc bias current v cs =5v 8.75 10.00 11.25 a v vs-cm-min v s sampling voltage to sw itch to the second pulse-by-pulse current limit in power limit mode (6) 0.55 v v vs-cm-max v s sampling voltage to switch back to the normal pulse-by-pulse current limit (6) 0.75 v v sn-cc v s sampling voltage to start frequency decreasing in cc mode v cs =5v, f s1 =f osc -2khz 2.15 v v sg-cc v s sampling voltage to end frequency decreasing in cc mode v cs =5v, f s2 =f osc-ccm +2khz 0.70 v s g-cc frequency decreasing slope of cc regulation s g-cc = (f s1 -f s2 ) /(v sn-cc -v sg-cc ) 52 64 76 khz/v i vs-uvp sinking current threshold for brownout protection (6) 47 a v vs-offset zcd comparator internal offset voltage (6) 200 mv v vs-ovp output over-voltage protection with v s sampling voltage 2.80 2.85 v t vs-ovp output over-voltage protection debounce time f=140khz 60 120 s current-sense section v vr internal reference voltage for cc regulation 2.475 2.500 2.525 v v ccr variation test voltage on cs pin for cc output (non-inverting input of error amplifier for cc regulation) v cs =0.41v 2.405 2.430 2.455 v v sth normal current limit threshold voltage 0.7 v v sth-va second current limit threshold voltage at power limit mode (vs ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 8 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology typical performance characteristics figure 12. leave zero duty cycle of fb v oltage (v fb-h ) vs. temperature figure 13. v s ove r - v oltage protection (v vs-ovp ) vs. temperature figure 14. reference voltage of cs ( v vr ) vs. temperature figure 15. v ariation v oltage on cs pin fo r cc regulation (v ccr ) vs. temperature figure 16. starting voltage of frequency decreasing of cc regulation (v sn-cc ) vs. temperature figure 17. ending voltage of frequency decreasing of cc regulation (v sg-cc ) vs. temperature 2.65 2.70 2.75 2.80 2.85 2.90 2.95 -40 -30 -15 0 25 50 75 85 100 125 v vs-ovp (v) temperature (oc) ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 9 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology typical performance characteristics figure 18. threshold voltage for current limit ( v sth ) vs. temperature figure 19. threshold voltage for current limit at power mode (v sth-va ) vs. temperature figure 20. minimum on time (t min ) vs. temperature figure 21.leading-edge blanking time (t leb ) vs. temperature figure 22. maximum duty cycle (dcy max ) vs. temperature figure 23. gate output clamp voltage ( v gate-clamp ) vs. temperature ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 10 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology operational description basic control principle figure 24 shows the internal pwm control circuit. the constant voltage (cv) regu lation is implemented in the same way as in a conventional isolated power supply, where the output voltage is sensed using a voltage divider and compared with the internal 2.5v reference of shut regulator (ka431) to generate a compensation signal. the compensation signal is transferred to the primary side using an opto-coupler and scaled down through an attenuator, av, generating v ea.v signal. then, the error signal v ea.v is applied to the pwm comparator (pwm.v) to determine the duty cycle. meanwhile, cc regulation is implemented internally without directly sensing output current. the output current estimator reconstructs output current data (v ccr ) using the transformer prim ary-side current and diode current discharge time. then v ccr is compared with a reference voltage (2.5v) by an internal error amplifier, generating a v ea.i signal to determine duty cycle. the two error signals, v ea.i and v ea.v , are compared with an internal sawtooth waveform (v saw ) by pwm comparators pwm.i and pwm.v, respectively, to determine the duty cycle. fi gure 24 shows the outputs of two comparators (pwm.i and pwm.v) combined with or gate and used as a reset signal of flip-flop to determine the mosfet turn-off instant. of v ea.v and v ea.i , the lower signal determines the duty cycle, as shown in figure 25. during cv regulation, v ea.v determines the duty cycle while v ea.i is saturated to high. during cc regulation mode, v ea.i determines the duty cycle while v ea.v is saturated to high. figure 24. internal pwm control circuit cv regulation cc regulation v saw v ea.i v ea.i v ea.v v ea.v pwm.v pwm.i osc clk gate figure 25.pwm operation for cc and cv output current estimation figure 26 shows the key waveform of a flyback converter operating in discontinuous conduction mode (dcm), where the secondary-side diode current reaches zero before the next switching cycle begins. since the output current estimator is designed for dcm operation, the power stage should be designed such that dcm is guaranteed for the entire oper ating range. the output current is obtained by averaging the triangular output diode current area over a switching cycle as: 2 d is p odavgpk ss t n ii i nt =< > = ? (1) where i pk is the peak value of the primary-side current; n p and n s are the number of turns of transformer primary side and secondary side, respectively; t dis is the diode current discharge time; and t s is the switching period. p pk s n i n ? p k i d avg o ii <>= figure 26. key waveforms of dcm flyback converter ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 11 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology with a given current sensing resistor, the output current can be programmed as: 1.25 p o sense s n i k rn = ? (2) where k is the design parameter of ic, which is 12 for fan302ul. the peak value of primary-side current is obtained by an internal peak-detection circuit while diode current discharge time is obtained by detecting the diode current zero-crossing instant. since the diode current cannot be sensed directly with primary-side control, the zero crossing detection (zcd) is accomplished indirectly by monitoring the auxiliary winding voltage. when the diode current reaches zero, the transformer winding voltage begins to drop by the resonance between the mosfet output capacitance and transformer magnetizing inductance. to detect the starting instant of t he resonance, the v s is sampled at 85% of the diode current disc harge time of the previous switching cycle and compared with the instantaneous v s voltage. when instantaneou s voltage of the vs pin drops below the sampled voltage by more than 200mv, zcd of diode current is obtained as shown in figure 27. 0.85 t dis (n-1) 200mv t dis (n) v s sampling v sh zcd figure 27. detailed waveform for zcd frequency reduction in cc mode the transformer should be designed to guarantee dcm operation over the whole operation range since the output current is properly estimated only in dcm operation. as can be seen in figure 28, the discharge time (t dis ) of the diode current increases as the output voltage decreases in cc mode. the converter tends to go into ccm as output voltage drops in cc mode when operating at the fixed switch ing frequency. to prevent this ccm operation and maintain good output current estimation in dcm, fan302ul decreases switching frequency as output voltage drops, as shown in figure 28 and figure 29. fan302ul indirectly monitors the output voltage by the sample-and-hold voltage (v sh ) of v s , which is taken at 85% of diode current discharge time of the previous switching cycle, as shown in figure 27. figure 30 shows how the frequency reduces as the sample-and-hold voltage of the vs pin decreases. figure 28. t dis variation in cc mode figure 29. frequency reduction with v sh cc g s v f ? = figure 30. frequency reduction curve in cc regulation ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 12 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology ccm prevention function even if the power supply is designed to operate in dcm, it can go into continuous conduction mode (ccm) when there is not enough design margin to cover all the circuit parameter variati ons and operating conditions. fan302ul has a ccm-prevention function that delays the next cycle turn-on of mosfet until zcd on the vs pin is obtained, as shown in figure 31. to guarantee stable dcm operation, fan302 ul prohibits the turn-on of the next switching cycl e for 10% of its switching period after zcd is obtained. in figure 31, the first switching cycle has zcd before 90% of its original switching period and, therefor e, the turn-on instant of the next cycle is determined from its original switching period without being affected by the zcd instant. the second switching cycle does not have zcd by the end of its original switching peri od. the turn-on of the third switching cycle occurs after zcd is obtained, with a delay of 10% of its origin al switching period. the minimum switching frequency the ccm-prevention function allows is 22khz (f osc-cm-min ). if the zcd is not given until the end of maximum switching period of 45.5s (1/22khz), the conv erter can go into ccm operation losing output regulation. figure 31. ccm prevention function power-limit mode when the sampled voltage of v s (v sh ) drops below v s- cm-min (0.55v), fan302ul enters constant power limit mode, where the primary-side current limit voltage (v cs ) changes from v sth (0.7v) to v sth-va (0.3v) to avoid miss-operation of v s sampling and zcd, as shown in figure 32. once the v s sampling voltage is higher than v s-cm-max (0.75v), the v cs returns to v sth . this mode prevents the power supply from going into ccm and losing output regulation when the output voltage is too low. this effectively protects the power supply when there is a fault condition in the load, such as output short or overload. this oper ation mode also implements soft-start by limiting the transformer current until the v s sampling voltage reaches v s-cm-max (0.75v). figure 32. power-limit mode operation high-voltage (hv) startup figure 33 shows the high-voltage startup circuit for fan302ul applications. internally a jfet is used to implement the high-voltage current source, whose characteristics are shown in figure 34. technically, the hv pin can be directly connected to the dc link (v dl ). however, to improve reliability and surge immunity, it is typical to use about 100k ? resistor between the hv pin and dc link. the actual hv current with given dc link voltage and startup resistor is determined by the intersection of v-i characteristics line and load line, as shown in figure 34. during startup, the internal startup circuit is enabled and the dc link supplies the current, i hv , to charge the hold- up capacitor, c vdd , through r start . when the v dd voltage reaches v dd-on , the internal hv startup circuit is disabled and the ic starts pwm switching. once the hv startup circuit is disabled, the energy stored in c vdd should supply the ic operating current until the transformer auxiliary winding voltage reaches the nominal value. therefore, c vdd should be designed to prevent v dd from dropping to v dd-off before the auxiliary winding builds up enough voltage to supply v dd . figure 33. hv startup circuit ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 13 fan302ul ? mwsaver tm pwm controller for low standby po wer battery-charger applications d lhv hv hv vv i r ? = d l h v v r d l v figure 34.v-i characteristics of hv pin frequency hopping emi reduction is accomplished by frequency hopping, which spreads the energy over a wider frequency range than the bandwidth of the em i test equipment, allowing compliance with emi limitations. the internal frequency- hopping circuit changes the switching frequency progressively between 135khz and 145khz with a period of t p , as shown in figure 35. figure 35. frequency hopping burst-mode operation the power supply enters burst mode at no-load or extremely light-load conditions. as shown in figure 36, when v fb drops below v fbl , the pwm output shuts off and the output voltage drops at a rate dependent on load current. this causes the feedback voltage to rise. once v fb exceeds v fbh , the internal circuit starts to provide switching pulse. the feedback voltage then falls and the process repeats. burst mode alternately enables and disables sw itching of the mosfet, reducing the switching losses in standby mode. once fan302ul enters burst mode, the operating current is reduced from 3.5ma to 200 a to minimize power consumption in burst mode. figure 36. burst-mode operation slope compensation the sensed voltage across the current-sense resistor is used for current-mode control and pulse-by-pulse current limiting. a synchronized ramp signal with positive slope is added to the current-sense information at each switching cycle, im proving noise immunity of current-mode control. protections the fan302ul self-protection functions include v dd over-voltage protection (v dd ovp), internal over- temperature protection (otp), v s over-voltage protection (v s ovp), and brownout protection. the v dd ovp and brownout protection are implemented as auto- restart mode, while the v s ovp and internal otp are implemented as latch mode. when an auto restart mode protection is triggered, switching is terminated and the mosfet remains off, causing v dd to drop. when v dd drops to the v dd turn-off voltage of 5v; the protection is reset, the internal startup circuit is enabled, and the supply current drawn from the hv pin charges the hold-up capacitor. when v dd reaches the turn-on voltag e of 16v, normal operation resumes. in this manner, auto restart alternately enables and disables mosfet switching until the abnormal condition is eliminated, as shown in figure 37. when a latch mode protection is triggered, pwm switching is terminated an d the mosfet remains off, causing v dd to drop. when v dd drops to the v dd turn-off voltage of 5v, the internal startup circuit is enabled without resetting the protection, and the supply current drawn from hv pin charges the hold-up capacitor. since the protection is not reset, the ic does not resume pwm switching even when v dd reaches the turn-on voltage of 16v, disabling the hv startup circuit. then, v dd drops again down to 5v. in this manner, the latch mode protection alternately charges and discharges v dd until there is no more energy in the dc link capacitor. the protection is reset when v dd drops to 2.5v, which is allowed only after power supply is unplugged from the ac line, as shown in figure 38. ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 14 fan302ul ? pwm controller for low sta ndby power battery-charger applications mwsaver? technology figure 37. auto-restart mode operation figure 38. latch-mode operation v dd over-voltage protection v dd over-voltage protection prevents ic damage from over-voltage exceeding the ic voltage rating. when the v dd voltage exceeds 26.5v due to abnormal conditions, the protection is triggered. th is protection is typically caused by an open circuit of the secondary-side feedback network. input voltage sensing and brownout protection the fan302ul indirectly senses input voltage using the vs pin current while the mosfet is turned on. since the vs pin voltage is clamped at 0.7v when the mosfet is turned on, the curr ent flowing out of the vs pin is approximately proportio nal to the input voltage, as shown in figure 38. current flowing out of the vs pin is calculated by: . 12 1 10.7 (0.7) aadl vs on dl p vs vs p vs nnv iv nrrnr =+ +? (3) current monitoring block v s r vs1 r vs2 c vs minimum on time modulation brownout protection v dl n p n a pwm control block figure 39.vs pin current sensing fan302ul modulates the minimum on time of the mosfet such that it r educes as input voltage increases, as shown figure 40. this allows smaller minimum on time for high-line condition, ensuring burst mode operation occurs at almost the same power level, regardless of line voltage variation. the minimum on time is also related to the bundle frequency of burst mode operation. the vs current is also used for brownout protection. when the current out of t he vs pin while the mosfet is on is smaller than 47 a for longer than 10ms, the brownout protection is triggered. figure 40. minimum on time vs. vs pin current over-temperature protection (otp) the temperature-sensing circuit shuts down pwm output if the junction temperature exceeds 140c (t otp ). v s over-voltage protection (ovp) v s over-voltage protection prevents damage due to output over-voltage conditions. figure 41 shows the v s ovp protection method. when abnormal system conditions occur that cause v s to exceed 2.8v, after a period of debounce time; pwm pulses are disabled and fan302ul enters latch mode until v dd drops to under v dd-lh . by that time, pwm pulses revive. v s over-voltage conditions are usually caused by an open circuit of the secondary-side feedback network or abnormal behavior by the vs pin divider resistor. ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 15 fan302ul ? pwm controller for low sta ndby power battery-charger applications mwsaver? technology figure 41. v s ovp protection leading-edge blanking (leb) each time the power mosfet is switched on, a turn-on spike occurs at the sense re sistor. to avoid premature termination of the switching pu lse, a 150ns leading-edge blanking time is built in. conventional rc filtering can therefore be omitted. during this blanking period, the current-limit comparator is disabled and it cannot switch off the gate driver. noise immunity noise from the current sens e or the control signal can cause significant pulse-width jitter. while slope compensation helps alleviate these problems, further precautions should still be ta ken. good placement and layout practices should be followed. avoid long pcb traces and component leads and, locate bypass filter components near the pwm ic. ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 16 fan302ul ? pwm controller for low sta ndby power battery-charger applications mwsaver? technology typical application circ uit (flyback charger) application fairchild device input voltage range output cell phone charger fan302ul 90~265v ac 5v/1.2a (6w) features ? ultra-low standby power co nsumption: <20mw at 264v ac (pin=6.3mw for 115v ac and pin=7.3mw for 230v ac ) ? output regulation: cv: 5%, cc: 15% figure 42.measured efficiency and output regulation figure 43.schematic of typical application circuit 66.0 68.0 70.0 72.0 74.0 76.0 78.0 80.0 25 50 75 100 efficiency (%) % load 90vac 115vac 230vac 264vac ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 17 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology typical application circuit (continued) transformer specification ? core: ei12.5 ? bobbin: ei12.5 figure 44.transformer ? w1 is space winding in one layer. ? w2 consists of three layers with different numbers of turns. the number of turns of each layer is specified in table 1. ? w3 consists of two layers with triple-insulated wire . the leads of positive and neg ative fly lines are 3.5cm and 2.5cm, respectively. table 1. transformer winding specifications no. terminal wire turns insulation start pin end pin turns w1 1 2 2uew 0.15*2 8 2 w2 4 5 2uew 0.12*1 22 0 22 1 22 3 w3 fly+ fly- tex-e 0.4*1 5 3 pin specifications remark primary-side inductance 4 5 530 h 7% 100khz, 1v primary-side effective leakage inductance 4 5 52 h 5% short one of the secondary windings ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 18 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology physical dimensions figure 45. 8-lead, small outline integrated circ uit (soic), jedec ms-012, .150-inch, narrow body package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packa ging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . 8 0 see detail a notes: unless otherwise specified a) this package conforms to jedec ms-012, variation aa, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) drawing filename: m08arev13 land pattern recommendation seating plane 0.10 c c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 c m ba 0.25 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.406 (1.04) option a - bevel edge option b - no bevel edge ? 2011 fairchild semiconductor corporation www.fairchildsemi.com fan302ul ? rev. 1.0.3 19 fan302ul ? pwm controller for low standby power battery-charger applications mwsaver? technology |
Price & Availability of FAN302ULMY
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |